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| 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Rev. 01 -- 12 September 2005 Product data sheet 1. General description The 74AUP1G79 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74AUP1G79 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. 2. Features s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114-C exceeds 2000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101-C exceeds 1000 V s Low static power consumption; ICC = 0.9 A (maximum) s Latch-up performance exceeds 100 mA per JESD 78 Class II s Inputs accept voltages up to 3.6 V s Low noise overshoot and undershoot < 10 % of VCC s IOFF circuitry provides partial Power-down mode operation s Multiple package options s Specified from -40 C to +85 C and -40 C to +125 C Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 C; tr = tf 3 ns. Symbol Parameter Conditions CL = 5 pF; RL = 1 M VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fclk(max) Ci CPD maximum clock frequency input capacitance power dissipation capacitance f = 10 MHz; VI = GND to VCC VCC = 1.8 V VCC = 3.3 V [1] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs. [1] Min 2.6 2.0 1.7 1.4 1.2 - Typ 19.7 5.5 3.8 3.1 2.3 2.0 309 0.8 Max 11.0 7.0 5.4 4.0 3.4 - Unit ns ns ns ns ns ns MHz pF tPHL, tPLH propagation delay CP to Q CL = 30 pF; VCC = 3.0 V to 3.6 V - 2.3 3.0 - pF pF 4. Ordering information Table 2: Ordering information Package Temperature range Name 74AUP1G79GW 74AUP1G79GM -40 C to +125 C -40 C to +125 C TSSOP5 XSON6 Description plastic thin shrink small outline package; 5 leads; body width 1.25 mm Version SOT353-1 Type number plastic extremely thin small outline package; no leads; SOT886 6 terminals; body 1 x 1.45 x 0.5 mm 5. Marking Table 3: Marking Marking code pP pP Type number 74AUP1G79GW 74AUP1G79GM 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 2 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger 6. Functional diagram 1 D Q 4 1 4 D CP mna441 2 CP mna440 2 Fig 1. Logic symbol Fig 2. IEC logic symbol CP C C C C D TG C TG C Q C C TG TG C C mna442 Fig 3. Logic diagram 7. Pinning information 7.1 Pinning 79 D D CP 1 2 5 VCC 1 6 VCC CP 2 5 n.c. 79 GND 3 4 Q 4 001aac562 GND 3 Q 001aac524 Transparent top view Fig 4. Pin configuration SOT353-1 (TSSOP5) Fig 5. Pin configuration SOT886 (XSON6) 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 3 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger 7.2 Pin description Table 4: Symbol D CP GND Q n.c. VCC Pin description Pin TSSOP5 1 2 3 4 5 XSON6 1 2 3 4 5 6 data input D clock pulse input CP ground (0 V) data output Q not connected supply voltage Description 8. Functional description 8.1 Function table Table 5: Input CP L [1] Function table [1] Output D L H X Q L H q H = HIGH voltage level; L = LOW voltage level; = LOW-to-HIGH CP transition; X = don't care; q = lower case letter indicates the state of referenced input, one set-up time prior to the LOW-to-HIGH CP transition. 9. Limiting values Table 6: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK VI IOK VO IO ICC Parameter supply voltage input clamping current input voltage output clamping current output voltage output current quiescent supply current VO > VCC or VO < 0 V active mode Power-down mode VO = 0 V to VCC [1] [1] Conditions VI < 0 V [1] Min -0.5 -0.5 -0.5 -0.5 - Max +4.6 -50 +4.6 50 Unit V mA V mA VCC + 0.5 V +4.6 20 +50 V mA mA 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 4 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Table 6: Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol IGND Tstg Ptot Parameter ground current storage temperature total power dissipation Tamb = -40 C to +125 C [2] Conditions Min -65 - Max -50 +150 250 Unit mA C mW [1] [2] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For TSSOP5 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 packages: above 45 C the value of Ptot derates linearly with 2.4 mW/K. 10. Recommended operating conditions Table 7: Symbol VCC VI VO Tamb tr, tf Recommended operating conditions Parameter supply voltage input voltage output voltage ambient temperature input rise and fall times VCC = 0.8 V to 3.6 V active mode Power-down mode; VCC = 0 V Conditions Min 0.8 0 0 0 -40 0 Max 3.6 3.6 VCC 3.6 +125 200 Unit V V V V C ns/V 11. Static characteristics Table 8: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 C VIH HIGH-state input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V VIL LOW-state input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 0.70 x VCC 0.65 x VCC 1.6 2.0 V V V V Conditions Min Typ Max Unit 0.30 x VCC V 0.35 x VCC V 0.7 0.9 V V 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 5 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Table 8: Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOH HIGH-state output voltage Conditions VI = VIH or VIL IO = -20 A; VCC = 0.8 V to 3.6 V IO = -1.1 mA; VCC = 1.1 V IO = -1.7 mA; VCC = 1.4 V IO = -1.9 mA; VCC = 1.65 V IO = -2.3 mA; VCC = 2.3 V IO = -3.1 mA; VCC = 2.3 V IO = -2.7 mA; VCC = 3.0 V IO = -4.0 mA; VCC = 3.0 V VOL LOW-state output voltage VI = VIH or VIL IO = 20 A; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V ILI IOFF IOFF ICC ICC Ci Co VIH input leakage current power-off leakage current additional power-off leakage current quiescent supply current VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V [1] Min VCC - 0.1 1.11 1.32 2.05 1.9 2.72 2.6 - Typ 0.8 1.7 Max 0.1 0.3 x VCC 0.31 0.31 0.31 0.44 0.31 0.44 0.1 0.2 0.2 0.5 40 - Unit V V V V V V V V V V V V V V V V A A A A A pF pF V V V V 0.75 x VCC - additional quiescent supply VI = VCC - 0.6 V; IO = 0 A; current (per pin) VCC = 3.3 V input capacitance output capacitance HIGH-state input voltage VCC = 0 V to 3.6 V; VI = GND or VCC VO = GND; VCC = 0 V VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Tamb = -40 C to +85 C 0.70 x VCC 0.65 x VCC 1.6 2.0 - VIL LOW-state input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 0.30 x VCC V 0.35 x VCC V 0.7 0.9 V V 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 6 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Table 8: Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOH HIGH-state output voltage Conditions VI = VIH or VIL IO = -20 A; VCC = 0.8 V to 3.6 V IO = -1.1 mA; VCC = 1.1 V IO = -1.7 mA; VCC = 1.4 V IO = -1.9 mA; VCC = 1.65 V IO = -2.3 mA; VCC = 2.3 V IO = -3.1 mA; VCC = 2.3 V IO = -2.7 mA; VCC = 3.0 V IO = -4.0 mA; VCC = 3.0 V VOL LOW-state output voltage VI = VIH or VIL IO = 20 A; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V ILI IOFF IOFF ICC ICC input leakage current power-off leakage current additional power-off leakage current quiescent supply current VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V [1] Min VCC - 0.1 0.7 x VCC 1.03 1.30 1.97 1.85 2.67 2.55 - Typ - Max 0.1 0.3 x VCC 0.37 0.35 0.33 0.45 0.33 0.45 0.5 0.5 0.6 0.9 50 Unit V V V V V V V V V V V V V V V V A A A A A additional quiescent supply VI = VCC - 0.6 V; IO = 0 A; current (per pin) VCC = 3.3 V HIGH-state input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Tamb = -40 C to +125 C VIH 0.75 x VCC 0.70 x VCC 1.6 2.0 V V V V VIL LOW-state input voltage VCC = 0.8 V VCC = 0.9 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 0.25 x VCC V 0.30 x VCC V 0.7 0.9 V V 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 7 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Table 8: Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VOH HIGH-state output voltage Conditions VI = VIH or VIL IO = -20 A; VCC = 0.8 V to 3.6 V IO = -1.1 mA; VCC = 1.1 V IO = -1.7 mA; VCC = 1.4 V IO = -1.9 mA; VCC = 1.65 V IO = -2.3 mA; VCC = 2.3 V IO = -3.1 mA; VCC = 2.3 V IO = -2.7 mA; VCC = 3.0 V IO = -4.0 mA; VCC = 3.0 V VOL LOW-state output voltage VI = VIH or VIL IO = 20 A; VCC = 0.8 V to 3.6 V IO = 1.1 mA; VCC = 1.1 V IO = 1.7 mA; VCC = 1.4 V IO = 1.9 mA; VCC = 1.65 V IO = 2.3 mA; VCC = 2.3 V IO = 3.1 mA; VCC = 2.3 V IO = 2.7 mA; VCC = 3.0 V IO = 4.0 mA; VCC = 3.0 V ILI IOFF IOFF ICC ICC input leakage current power-off leakage current additional power-off leakage current quiescent supply current VI = GND to 3.6 V; VCC = 0 V to 3.6 V VI or VO = 0 V to 3.6 V; VCC = 0 V VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V [1] Min Typ Max 0.11 0.41 0.39 0.36 0.50 0.36 0.50 0.75 0.75 0.75 1.4 75 Unit V V V V V V V V V V V V V V V A A A A A VCC - 0.11 0.6 x VCC 0.93 1.17 1.77 1.67 2.40 2.30 - 0.33 x VCC V additional quiescent supply VI = VCC - 0.6 V; IO = 0 A; current (per pin) VCC = 3.3 V [1] One input at VCC - 0.6 V, other input at VCC or GND. 12. Dynamic characteristics Table 9: Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7 Symbol tPHL, tPLH Parameter propagation delay CP to Q Conditions see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 9397 750 14682 Min Typ [1] Max Unit Tamb = 25 C; CL = 5 pF 2.6 2.0 1.7 1.4 1.2 19.7 5.5 3.8 3.1 2.3 2.0 11.0 7.0 5.4 4.0 3.4 ns ns ns ns ns ns (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 8 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Table 9: Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7 Symbol fclk(max) Parameter maximum clock frequency Conditions see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Tamb = 25 C; CL = 10 pF tPHL, tPLH propagation delay CP to Q see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fclk(max) maximum clock frequency see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Tamb = 25 C; CL = 15 pF tPHL, tPLH propagation delay CP to Q see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fclk(max) maximum clock frequency see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 50 181 301 407 422 481 MHz MHz MHz MHz MHz MHz 3.5 2.8 2.4 2.2 2.0 26.6 7.1 5.0 4.1 3.2 2.9 13.6 9.2 7.1 5.4 4.5 ns ns ns ns ns ns 52 192 324 421 486 550 MHz MHz MHz MHz MHz MHz 3.1 2.5 2.1 1.8 1.7 23.1 6.3 4.4 3.6 2.8 2.5 12.3 8.1 6.3 4.7 4.1 ns ns ns ns ns ns 53 203 347 435 550 619 MHz MHz MHz MHz MHz MHz Min Typ [1] Max Unit 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 9 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Table 9: Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7 Symbol tPHL, tPLH Parameter propagation delay CP to Q Conditions see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fclk(max) maximum clock frequency see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V Tamb = 25 C tsu(H) set-up time HIGH D to CP see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V tsu(L) set-up time LOW D to CP see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V th hold time D to CP see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V -1.9 -0.6 -0.4 -0.4 -0.4 -0.3 ns ns ns ns ns ns 3.0 0.9 0.6 0.5 0.5 0.7 ns ns ns ns ns ns 3.4 0.8 0.5 0.5 0.4 0.4 ns ns ns ns ns ns 28 128 206 262 269 309 MHz MHz MHz MHz MHz MHz 4.7 3.8 3.3 3.0 2.8 36.8 9.3 6.4 5.3 4.3 3.9 17.3 11.8 9.4 7.0 5.8 ns ns ns ns ns ns Min Typ [1] Max Unit Tamb = 25 C; CL = 30 pF 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 10 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Table 9: Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7 Symbol tW Parameter CP pulse width HIGH or LOW Conditions see Figure 6 VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V CPD power dissipation capacitance f = 10 MHz VCC = 0.8 V VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V [1] [2] All typical values are measured at nominal VCC. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + (CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL x VCC2 x fo) = sum of the outputs. The condition is VI = GND to VCC. [2] [3] Min - Typ 2.4 1.3 0.9 0.7 0.6 2.2 2.2 2.2 2.3 2.6 3.0 [1] Max - Unit ns ns ns ns ns ns pF pF pF pF pF pF [3] 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 11 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Table 10: Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7 Symbol CL = 5 pF tPHL, tPLH propagation delay CP to Q see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fclk(max) maximum clock frequency see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V CL = 10 pF tPHL, tPLH propagation delay CP to Q see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fclk(max) maximum clock frequency see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V CL = 15 pF tPHL, tPLH propagation delay CP to Q see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fclk(max) maximum clock frequency see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 9397 750 14682 Parameter Conditions -40 C to +85 C -40 C to +125 C Unit Min Max Min Max 2.4 1.8 1.5 1.1 0.9 170 310 400 490 550 12.9 8.1 6.4 4.7 4.0 - 2.4 1.8 1.5 1.1 0.9 170 300 390 480 510 14.2 9.0 7.1 5.2 4.4 - ns ns ns ns ns MHz MHz MHz MHz MHz 2.8 2.2 1.9 1.5 1.3 150 280 310 370 410 14.4 9.5 7.5 5.6 4.5 - 2.8 2.2 1.9 1.5 1.3 150 230 250 360 360 15.9 10.5 8.3 6.2 5.0 - ns ns ns ns ns MHz MHz MHz MHz MHz 3.2 2.5 2.2 1.9 1.6 120 190 240 300 320 15.6 10.7 8.5 6.3 5.0 - 3.2 2.5 2.2 1.9 1.6 120 160 190 270 300 17.2 11.8 9.4 7.0 5.5 - ns ns ns ns ns MHz MHz MHz MHz MHz (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 12 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Table 10: Dynamic characteristics ...continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7 Symbol CL = 30 pF tPHL, tPLH propagation delay CP to Q see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V fclk(max) maximum clock frequency see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V CL = 5 pF, 10 pF, 15 pF and 30 pF tsu(H) set-up time HIGH D to CP see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V tsu(L) set-up time LOW D to CP see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V th hold time D to CP see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V tW CP pulse width HIGH or LOW see Figure 6 VCC = 1.1 V to 1.3 V VCC = 1.4 V to 1.6 V VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3.0 V to 3.6 V 3.5 2.0 1.9 2.0 2.2 3.5 2.0 1.9 2.0 2.2 ns ns ns ns ns 0 0 0 0 0 0 0 0 0 0 ns ns ns ns ns 1.6 1.0 0.9 0.8 1.0 1.6 1.0 0.9 0.8 1.0 ns ns ns ns ns 1.6 1.0 0.9 0.7 0.6 1.6 1.0 0.9 0.7 0.6 ns ns ns ns ns 70 120 150 190 200 70 110 120 170 190 MHz MHz MHz MHz MHz 4.2 3.3 3.0 2.7 2.6 23.3 14.3 11.3 8.5 7.2 4.2 3.3 3.0 2.7 2.6 25.6 15.7 12.4 9.4 7.9 ns ns ns ns ns Parameter Conditions -40 C to +85 C -40 C to +125 C Unit Min Max Min Max 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 13 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger 13. Waveforms VI D input GND th t su(L) 1/fclk VI CP input GND tW t PHL VOH Q output VOL VM 001aad498 VM th t su(H) VM t PLH Measurement points are given in Table 11. Logic levels: VOL and VOH are typical output voltage drop that occur with the output load. Fig 6. The clock input (CP) to output (Q) propagation delays, clock input (CP) pulse width, data input (D) to clock input (CP) set-up times, clock input (CP) to data input (D) hold times and the maximum input clock (CP) frequency Table 11: VCC 0.8 V to 3.6 V Measurement points Output VM 0.5 x VCC Input VM 0.5 x VCC VI VCC tr = tf 3.0 ns Supply voltage VCC VEXT 5 k PULSE GENERATOR VI VO DUT RT CL RL 001aac521 Test data is given in Table 12. Definitions for test circuit: RL = Load resistor CL = Load capacitance including jig and probe capacitance RT = Termination resistance should be equal to the output impedance Zo of the pulse generator Fig 7. Load circuitry for switching times 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 14 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger Test data Load CL RL [1] Table 12: VCC Supply voltage 0.8 V to 3.6 V [1] VEXT tPLH, tPHL tPZH, tPHZ GND tPZL, tPLZ 2 x VCC 5 pF, 10 pF, 5 k or 1 M open 15 pF and 30 pF For measuring enable and disable times RL = 5 k, for measuring propagation delays, setup and hold times and pulse width RL = 1 M. 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 15 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger 14. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 D E A X c y HE vMA Z 5 4 A2 A1 (A3) A 1 e e1 bp 3 wM detail X Lp L 0 1.5 scale 3 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.1 0 A2 1.0 0.8 A3 0.15 bp 0.30 0.15 c 0.25 0.08 D(1) 2.25 1.85 E(1) 1.35 1.15 e 0.65 e1 1.3 HE 2.25 2.0 L 0.425 Lp 0.46 0.21 v 0.3 w 0.1 y 0.1 Z(1) 0.60 0.15 7 0 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC MO-203 JEITA SC-88A EUROPEAN PROJECTION ISSUE DATE 00-09-01 03-02-19 Fig 8. Package outline SOT353-1 (TSSOP5) 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 16 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886 b 1 2 3 4x L1 L (2) e 6 e1 5 e1 4 6x (2) A A1 D E terminal 1 index area 0 DIMENSIONS (mm are the original dimensions) UNIT mm A (1) max 0.5 A1 max 0.04 b 0.25 0.17 D 1.5 1.4 E 1.05 0.95 e 0.6 e1 0.5 L 0.35 0.27 L1 0.40 0.32 1 scale 2 mm Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT886 REFERENCES IEC JEDEC MO-252 JEITA EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22 Fig 9. Package outline SOT886 (XSON6) 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 17 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger 15. Abbreviations Table 13: Acronym CMOS TTL HBM ESD MM CDM Abbreviations Description Complementary Metal Oxide Semiconductor Transistor Transistor Logic Human Body Model ElectroStatic Discharge Machine Model Charged Device Model 16. Revision history Table 14: Revision history Release date 20050912 Data sheet status Product data sheet Change notice Doc. number 9397 750 14682 Supersedes Document ID 74AUP1G79_1 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 18 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger 17. Data sheet status Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). III Product data Production [1] [2] [3] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 18. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 20. Trademarks Notice -- All referenced brands, product names, service names and trademarks are the property of their respective owners. 19. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors 21. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 14682 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 -- 12 September 2005 19 of 20 Philips Semiconductors 74AUP1G79 Low-power D-type flip-flop; positive-edge trigger 22. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 9 10 11 12 13 14 15 16 17 18 19 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Contact information . . . . . . . . . . . . . . . . . . . . 19 (c) Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 12 September 2005 Document number: 9397 750 14682 Published in The Netherlands |
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